Find Instructions Hidden In Your CPU

There was a time when owning computer meant you probably knew most or all of the instructions it could execute. Your modern PC, though, has a lot of instructions, many of them meant for specialized operating system, encryption, or digital signal processing features.

There are known undocumented instructions in a lot of x86-class CPUs, too. What’s more, these days your x86 CPU might really be a virtual machine running on a different processor, or your CPU could have a defect or a bug. Maybe you want to run sandsfilter–a program that searches for erroneous or undocumented instructions. Who knows what …read more

Paul Jacob Evans


Virtual CPU Stays on Script

Some will see it as a great thing, and others as an example of how JavaScript is being abused daily, but [Francis Stokes] decided to design his own CPU architecture and implemented a virtual version of it using JavaScript. The CPU is a 16-bit affair and has a simplified assembly language. The code is on GitHub, but the real value is [Francis’] exposition of the design in the original post.

While discussing the design, [Francis] reveals his first pass at the instruction set, discussed what he found wrong about it, and then reveals the final set composed of real instructions …read more

Paul Jacob Evans

VexRiscv: A Modular RISC-V Implementation for FPGA

Since an FPGA is just a sea of digital logic components on a chip, it isn’t uncommon to build a CPU using at least part of the FPGA’s circuitry. VexRiscv is an implementation of the RISC-V CPU architecture using a language called SpinalHDL.

SpinalHDL is a high-level language conceptually similar to Verilog or VHDL and can compile to Verilog or VHDL, so it should be compatible with most tool chains. VexRiscv shows off well in this project since it is very modular. You can add instructions, an MMU, JTAG debugging, caches and more.

When you build a CPU in FPGA, …read more

Paul Jacob Evans

Learn by Fixing: Another Verilog CPU

Because I often work with students, I’m always on the look-out for a simple CPU, preferably in Verilog, in the Goldilocks zone. That is, not too easy and not too hard. I had high hopes for this 16-bit RISC processor presented by [fpga4student], but without some extra work, it probably isn’t usable for its intended purpose.

The CPU itself is pretty simple and fits on a fairly long web page. However, the details about it are a bit sparse. This isn’t always a bad thing. You can offer students too much help. Then again, you can also offer too little. …read more

Paul Jacob Evans